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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
* The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT85 4-bit magnitude comparator
Product specification File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specification
4-bit magnitude comparator
FEATURES * Serial or parallel expansion without extra gating * Magnitude comparison of any binary words * Output capability: standard * ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT85 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT85 are 4-bit magnitude comparators that can be expanded to almost any length. They perform comparison of two 4-bit binary, BCD or other monotonic codes and present the three possible magnitude results at the outputs (QA>B, QA=B and QA74HC/HCT85
weighted (A0 to A3 and B0 to B3), where A3 and B3 are the most significant bits. The operation of the "85" is described in the function table, showing all possible logic conditions. The upper part of the table describes the normal operation under all conditions that will occur in a single device or in a series expansion scheme. In the upper part of the table the three outputs are mutually exclusive. In the lower part of the table, the outputs reflect the feed forward conditions that exist in the parallel expansion scheme. For proper compare operation the expander inputs (IA>B, IA=B and IAB = = LOW and IA=B = HIGH. For words greater than 4-bits, units can be cascaded by connecting outputs QA and QA=B to the corresponding inputs of the significant comparator.
TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay An, Bn to QA>B, QAB to QAB IA=B to QA=B CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz fo = output frequency in MHz (CL x VCC2 x fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". input capacitance power dissipation capacitance per package notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 20 18 15 11 3.5 18 22 20 15 15 3.5 20 ns ns ns ns pF pF HCT UNIT
December 1990
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Philips Semiconductors
Product specification
4-bit magnitude comparator
PIN DESCRIPTION PIN NO. 2 3 4 5 6 7 8 9, 11, 14, 1, 10, 12, 13, 15 16 SYMBOL IAB QA>B QA=B QA B expansion input A > B output A = B output A < B output ground (0 V) word B inputs word A inputs positive supply voltage
74HC/HCT85
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
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Philips Semiconductors
Product specification
4-bit magnitude comparator
74HC/HCT85
Fig.4 Functional diagram.
APPLICATIONS * Process controllers * Servo-motor control FUNCTION TABLE COMPARING INPUTS A3, B3 A3>B3 A3B2 A2B1 A1B0 A0B X X X X X X X X H L L X H L CASCADING INPUTS IAB H L H L H L H L H L L L L H OUTPUTS QADecember 1990
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Philips Semiconductors
Product specification
4-bit magnitude comparator
74HC/HCT85
Fig.5 Logic diagram.
December 1990
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Philips Semiconductors
Product specification
4-bit magnitude comparator
DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HC SYMBOL PARAMETER +25 min. typ. tPHL/ tPLH propagation delay An, Bn to QA>B or QAB to QAB propagation delay IA=B to QA=B output transition time 63 23 18 58 21 17 50 18 14 39 14 11 19 7 6 max. 195 39 33 175 35 30 140 28 24 120 24 20 75 15 13 -40 to +85 min. max. 245 49 42 220 44 37 175 35 30 150 30 26 95 19 16 -40 to +125 UNIT min. max. 295 59 50 265 53 45 210 42 36 180 36 31 110 22 19 ns
74HC/HCT85
TEST CONDITIONS VCC WAVEFORMS (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Fig.6
tPHL/ tPLH
ns
Fig.6
tPHL/ tPLH
ns
Fig.6
tPHL/ tPLH
ns
Fig.6
tTHL/ tTLH
ns
Fig.6
December 1990
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Philips Semiconductors
Product specification
4-bit magnitude comparator
DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI Note to HCT types
74HC/HCT85
The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT IAB IA=B An, Bn
UNIT LOAD COEFFICIENT 1.00 1.00 1.50 1.50
AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HCT SYMBOL PARAMETER +25 min. typ. tPHL/ tPLH tPHL/ tPLH tPHL/ tPLH propagation delay An, Bn to QA>B or QAB to QAB propagation delay IA=B to QA=B output transition time 26 24 18 max. 44 40 31 -40 to +85 min. max. 55 50 39 -40 to +125 UNIT min. max. 66 60 47 ns ns ns 4.5 4.5 4.5 Fig.6 Fig.6 Fig.6 VCC WAVEFORMS (V) TEST CONDITIONS
tPHL/ tPLH tTHL/ tTLH
18 7
31 15
39 19
47 22
ns ns
4.5 4.5
Fig.6 Fig.6
December 1990
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Philips Semiconductors
Product specification
4-bit magnitude comparator
AC WAVEFORMS
74HC/HCT85
(1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.6
Waveforms showing the word A inputs (An), word B inputs (Bn) and expansion inputs (In) to the outputs (Qn) propagation delays and the output transition times.
APPLICATION INFORMATION
Fig.7 Series cascading; comparing 12-bit words.
December 1990
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Philips Semiconductors
Product specification
4-bit magnitude comparator
74HC/HCT85
Fig.8 Parallel cascading; comparing 12-bit words.
PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines".
December 1990
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